Traditional semiconductors and IC devices are typically packaged in a variety of ways to provide redistribution from the terminals on the die to a spacing that is conducive to cost effective printed circuit board (“PCB”) fabrication techniques. In many cases, the size and distance between die terminals is so small that the device cannot be connected to the final PCB without some sort of fan out or routing. The packages also serve to protect the fragile silicon or provide additional functions such as thermal management or near device decoupling. In many cases, the size and distance between die terminals is so small that the IC device cannot be connected to the final PCB without some sort of re-routing interface.
Most IC devices are produced with terminals in either a peripheral pattern that runs along the edges of the IC device or an area array pattern that spans across the surface of the IC device. Devices with the terminals along the edge are typically connected to the package by a method called wirebonding, where a very fine wire is bonded to the terminal and strung in a controlled manner to the corresponding package lead.
After all the terminals are connected, the package is typically overmolded with a plastic material to protect the wirebonds and keep them from dislodging or shorting to each other. In most cases, the connection of the IC device to the package is generally not reworkable once packaged and if there is a missing or broken connection it is difficult to repair.
The terminals on the package are generally transitioned to the PCB in two main ways. The first version includes a metal leadframe with formed metal leads extend from the package in what is called a gullwing shape. The leads are placed into solder which is reflowed to provide the final connection to the PCB. In the second version, the formed leads are left off the package which is often called a no lead configuration. This version is constructed with a trace or pad that is soldered directly to the corresponding pad on the PCB using solder paste which is reflowed.
Both methods have benefits and limitations. The leadframe style packages have been in use for many years, and have a low cost due to the established infrastructure. One of the big benefits of this style is the formed metal leads act as a flexible member that helps to decouple the stress induced when the PCB and the package expand and contract during thermal cycles as well as during a shock event. This stress decoupling adds to the reliability of the interconnect. The metal leadframe approach, however, is primarily used for relatively low pin count applications. The leads and wirebonds also have a relatively high inductance which can degrade electrical performance.
The no lead package approach has been very popular in recent years for wireless and power applications. The elimination of the formed metal lead extending from the package reduces cost and improves electrical performance by eliminating the leads. One limitation of the no lead types of packages is the lack of compliance at the terminal when soldered to the PCB. The solder reflowed to join the pad on the package to the pad on the PCB can see significant stress during thermal cycling or physical shock such as dropping a cell phone.
There also have been advancements in recent years in both package types where multiple IC devices are placed in the same package, creating what has been nicknamed SiP or “system in package”. Placing multiple IC devices in a single package further complicates the problems discussed above.